August 2018, 1(3): 281-294. doi: 10.3934/mfc.2018013

Improve symmetry of arbiter in APUF

1. 

School of Computer & Communication Engineering, University of Science and Technology Beijing, Beijing 100086, China

2. 

School of Urban Rail Transportation, Soochow University, Suzhou 215006, China

* Corresponding author: Huansheng Ning

Received  December 2017 Revised  March 2018 Published  July 2018

Fund Project: The first author is supported by National Natural Science Foundation of China (61471035, 61774014)

Arbiter-based physical unclonable function (APUF) is a classical kind of physical unclonable function (PUF). In APUF-based device authentication, the fairness of traditional APUF is insufficient due to setup time of arbiter. To solve this problem, in this paper we design an arbiter and conduct Monte Carlo simulations to test the performance of the new arbiter. In addition, we present some new evaluation metrics to evaluate the new arbiter quantitatively. Finally, we certify that the new arbiter can work continuously with both one stage racing paths and eight stages racing paths. The new arbiter has good performance in correct rate, stability and fairness. Particularly, it mitigates the setup time problem by reducing the Asymmetry.

Citation: Yang Xu, Huansheng Ning, Lingfeng Mao, Youzhong Li, Lijun Zhang. Improve symmetry of arbiter in APUF. Mathematical Foundations of Computing, 2018, 1 (3) : 281-294. doi: 10.3934/mfc.2018013
References:
[1]

K. FruhashiM. ShiozakiA. FukushimaT. Murayama and T. Fujino, The arbiter-puf with high uniqueness utilizing novel arbiter circuit with delay-time measurement, International Symposium on Circuits and Systems, (2011), 2325-2328. doi: 10.1109/ISCAS.2011.5938068.

[2]

B. GassendD. ClarkeM. Van Dijk and S. Devadas, Silicon physical random functions, Proceedings of the 9th ACM Conference on Computer and Communications Security, (2002), 148-160. doi: 10.1145/586110.586132.

[3]

B. GassendD. ClarkeM. Van Dijk and S. Devadas, Delay-based circuit authentication and applications, Proceedings of the 2003 ACM Symposium on Applied Computing, (2003), 294-301. doi: 10.1145/952532.952593.

[4]

B. GassendD. LimD. ClarkeM. Van Dijk and S. Devadas, Identification and authentication of integrated circuits, Concurrency and Computation: Practice and Experience, 16 (2004), 1077-1098. doi: 10.1002/cpe.805.

[5]

B. Gassend, M. van Dijk, D. Clarke and S. Devadas, Controlled physical random functions, 18th Annual Computer Security Applications Conference, 2002. Proceedings, (2003). doi: 10.1109/CSAC.2002.1176287.

[6]

P. F. HuH. S. NingT. QiuH. B. SongY. N. Wang and X. X. Yao, Security and privacy preservation scheme of face identification and resolution framework using fog computing in internet of things, IEEE Internet of Things Journal, 4 (2017), 1143-1155. doi: 10.1109/JIOT.2017.2659783.

[7]

J. W. Lee, D. Lim, B. Gassend, G. E. Suh, M. Van Dijk and S. Devadas, A technique to build a secret key in integrated circuits for identification and authentication applications, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No. 04CH37525), (2004). doi: 10.1109/VLSIC.2004.1346548.

[8]

R. X. Li, Improvement of arbiter-based puf, Zhongguo Keji Lunwen Zaixian/ Sciencepaper Online, 6 (2011), 707-710.

[9]

D. LimJ. W. LeeB. GassendG. E. SuhM. Van Dijk and S. Devadas, Extracting secret keys from integrated circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 13 (2005), 1200-1205. doi: 10.1109/TVLSI.2005.859470.

[10]

K. Lofstrom, W. R. Daasch and D. Taylor, Ic identification circuit using device mismatch, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No. 00CH37056), (2000). doi: 10.1109/ISSCC.2000.839821.

[11]

M. Majzoobi, F. Koushanfar and S. Devadas, Fpga puf using programmable delay lines, 2010 IEEE International Workshop on Information Forensics and Security, (2010). doi: 10.1109/WIFS.2010.5711471.

[12]

R. PappuB. RechtJ. Taylor and N. Gershenfeld, Physical one-way functions, Science, 297 (2002), 2026-2030. doi: 10.1126/science.1074376.

[13]

R. Y. Rubinstein and D. P. Kroese, Simulation and the Monte Carlo Method, Wiley-Interscience [John Wiley & Sons], Hoboken, NJ, 2008. doi: 10.1002/9780470230381.

[14]

G. E. Suh and S. Devada, Physical unclonable functions for device authentication and secret key generation, Proceedings of the 44th Annual Design Automation Conference, (2007), 9-14. doi: 10.1145/1278480.1278484.

[15]

J. Q. ZhangD. W. Gu and F. Y. Hou, Design and analysis of improved arbiter puf, Computer Engineering, 3 (2010), 86.

[16]

J. L. ZhangG. QuY. Q. Lv and Q. Zhou, A survey on silicon pufs and recent advances in ring oscillator pufs, Journal of Computer Science and Technology, 29 (2014), 664-678. doi: 10.1007/s11390-014-1458-1.

show all references

References:
[1]

K. FruhashiM. ShiozakiA. FukushimaT. Murayama and T. Fujino, The arbiter-puf with high uniqueness utilizing novel arbiter circuit with delay-time measurement, International Symposium on Circuits and Systems, (2011), 2325-2328. doi: 10.1109/ISCAS.2011.5938068.

[2]

B. GassendD. ClarkeM. Van Dijk and S. Devadas, Silicon physical random functions, Proceedings of the 9th ACM Conference on Computer and Communications Security, (2002), 148-160. doi: 10.1145/586110.586132.

[3]

B. GassendD. ClarkeM. Van Dijk and S. Devadas, Delay-based circuit authentication and applications, Proceedings of the 2003 ACM Symposium on Applied Computing, (2003), 294-301. doi: 10.1145/952532.952593.

[4]

B. GassendD. LimD. ClarkeM. Van Dijk and S. Devadas, Identification and authentication of integrated circuits, Concurrency and Computation: Practice and Experience, 16 (2004), 1077-1098. doi: 10.1002/cpe.805.

[5]

B. Gassend, M. van Dijk, D. Clarke and S. Devadas, Controlled physical random functions, 18th Annual Computer Security Applications Conference, 2002. Proceedings, (2003). doi: 10.1109/CSAC.2002.1176287.

[6]

P. F. HuH. S. NingT. QiuH. B. SongY. N. Wang and X. X. Yao, Security and privacy preservation scheme of face identification and resolution framework using fog computing in internet of things, IEEE Internet of Things Journal, 4 (2017), 1143-1155. doi: 10.1109/JIOT.2017.2659783.

[7]

J. W. Lee, D. Lim, B. Gassend, G. E. Suh, M. Van Dijk and S. Devadas, A technique to build a secret key in integrated circuits for identification and authentication applications, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No. 04CH37525), (2004). doi: 10.1109/VLSIC.2004.1346548.

[8]

R. X. Li, Improvement of arbiter-based puf, Zhongguo Keji Lunwen Zaixian/ Sciencepaper Online, 6 (2011), 707-710.

[9]

D. LimJ. W. LeeB. GassendG. E. SuhM. Van Dijk and S. Devadas, Extracting secret keys from integrated circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 13 (2005), 1200-1205. doi: 10.1109/TVLSI.2005.859470.

[10]

K. Lofstrom, W. R. Daasch and D. Taylor, Ic identification circuit using device mismatch, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No. 00CH37056), (2000). doi: 10.1109/ISSCC.2000.839821.

[11]

M. Majzoobi, F. Koushanfar and S. Devadas, Fpga puf using programmable delay lines, 2010 IEEE International Workshop on Information Forensics and Security, (2010). doi: 10.1109/WIFS.2010.5711471.

[12]

R. PappuB. RechtJ. Taylor and N. Gershenfeld, Physical one-way functions, Science, 297 (2002), 2026-2030. doi: 10.1126/science.1074376.

[13]

R. Y. Rubinstein and D. P. Kroese, Simulation and the Monte Carlo Method, Wiley-Interscience [John Wiley & Sons], Hoboken, NJ, 2008. doi: 10.1002/9780470230381.

[14]

G. E. Suh and S. Devada, Physical unclonable functions for device authentication and secret key generation, Proceedings of the 44th Annual Design Automation Conference, (2007), 9-14. doi: 10.1145/1278480.1278484.

[15]

J. Q. ZhangD. W. Gu and F. Y. Hou, Design and analysis of improved arbiter puf, Computer Engineering, 3 (2010), 86.

[16]

J. L. ZhangG. QuY. Q. Lv and Q. Zhou, A survey on silicon pufs and recent advances in ring oscillator pufs, Journal of Computer Science and Technology, 29 (2014), 664-678. doi: 10.1007/s11390-014-1458-1.

Figure 1.  Delay difference
Figure 2.  Stage circuit
Figure 3.  The statistics and fitting result of 1 stage
Figure 4.  The 100 fitting curves of 8 stages
Figure 5.  Circuit of D latch arbiter
Figure 6.  Circuit of 2N arbiter
Figure 7.  Time series of 2N arbiter
Figure 8.  PA of an imaginary arbiter and PS of the corresponding arbitration strategy
Figure 9.  PA of a D latch arbiter and PS of the corresponding arbitration strategy
Figure 10.  PA of a 2N arbiter and PS of the corresponding arbitration strategy
Figure 11.  CRA of an imaginary arbiter CRA([ -0.05ns, 0.05ns]) = 0.8925
Figure 12.  CRA of a D latch arbiter CRA([-0.007ns, 0.007ns]) = 0.5000 CRA([-0.040ns, 0.040ns]) = 0.6260
Figure 13.  CRA of a 2N arbiter CRA([-0.007ns, 0.007ns]) = 0.9036 CRA([-0.040ns, 0.040ns]) = 0.9831
Figure 15.  Instability of a D latch arbiter Instability([-0.007ns, 0.007ns]) = 0.0000 Instability([-0.040ns, 0.040ns]) = 0.0286
Figure 16.  Instability of a 2N arbiter Instability([-0.007ns, 0.007ns]) = 0.1928 Instability([-0.040ns, 0.040ns]) = 0.0337
Figure 14.  Instability of an imaginary arbiter Instability([ -0.05ns, 0.05ns]) = 0.1942
Figure 17.  Asymmetry of an imaginary arbiter Asymmetry([0ns, 0.05ns]) = 0.0313
Figure 18.  Asymmetry of a D latch arbiter Asymmetry([0ns, 0.007ns]) = 1.0000 Asymmetry([0ns, 0.040ns]) = 0.7480
Figure 19.  Asymmetry of a 2N arbiter Asymmetry([0ns, 0.007ns]) = 0.0221 Asymmetry([0ns, 0.040ns]) = 0.0039
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